This invention relates to a method of manufacturing a semiconductor device and more particularly a method of manufacturing a semiconductor device which is adapted for the isolation of an element by an insulation material.
Hitherto, the element of a semiconductor device has been isolated by forming the so-called field oxide layer by selective oxidation around that region of a semiconductor substrate in which the element is formed. The technique of isolating the element of the semiconductor device indeed has an advantage of helping to facilitate the high density integration of a semiconductor device and simplify its manufacturing process, but is accompanied with the undermentioned noticeable drawbacks.
In the first place, an oxide layer for isolation of the semiconductor element is embedded in a semiconductor substrate, giving rise to a serious deformation of the substrate and sometimes crystalline defects like oxidation-induced stacking faults (abbreviated as OSF) and dislocations, and consequently deteriorating the electric property of the semiconductor element. To avoid the occurrence of such deformation and stacking faults, it is necessary to impose a rigid limitation on the structure of the element and thickness of an oxidation-resistant mask and the condition of selective oxidation and sometimes the selection of a semiconductor substrate itself. Reference was previously made to said first drawback in "High Pressure Oxidation for Isolation of High Speed Bipolar Devices", IEDM (1979), pages 340 to 343.
In the second place, the formation of a field oxide layer for isolation of semiconductor elements consumed long hours of oxidation, adversely affecting the diffusion and redistribution of an impurity of a channel stopper. Long hours of field oxidation leads to a broad lateral diffusion of an impurity layer, decreasing the effective channel width of a MOS transistor and increasing the drain junction capacity of said transistor, and consequently obstructing the development of a high speed semiconductor device. Further, it is necessary to increase the dose of ion implantation, and elevate acceleration voltage in consideration of the effect of the redistribution of an impurity into an oxidized layer, thus decreasing the yield of a semiconductor device due to damage caused by excess ion implantation.
The third drawback is that where the formation of an oxide layer for isolation of semiconductor elements is effected by selective oxidation with a nitride layer used as an oxidation-resistant mask, then a silicon nitride layer known as a white ribbon is produced on a silicon substrate under the nitride layer at the tip of the bird's beak, reducing the breakdown voltage of a semiconductor element.